EquipmentStatus: FOUNDATIONALUpdated 2026-08-24

Optical Patterned-Wafer Inspection System

A high-throughput optical system that detects and maps defects on patterned wafers for process monitoring and yield learning.

Evidence status

Checked against 1 inspected source

One source was retrieved, identified and read, and the claims below are tied to specific passages at the scope those passages state. Each source also records what it cannot establish.

Rely on this page for

The specific claims that carry a cited passage, at the scope that passage states.

Definition

An optical patterned-wafer inspector illuminates and scans production wafers, compares detected signals across dies or to a reference, and applies detection and classification algorithms to identify candidate defects at useful production throughput.

Process position

Inputs

  • Processed wafer
  • Inspection recipe
  • Die or design reference
  • Defect thresholds

Outputs

  • Defect map
  • Candidate images or signatures
  • Excursion indicators

How it works

  1. 01Load and align wafer
  2. 02Select optical and detection mode
  3. 03Scan production area
  4. 04Detect and classify candidates
  5. 05Sample review and disposition

Role in the production flow

Optical inspection trades ultimate resolution for broad, fast coverage. It is normally paired with slower review and analysis tools so that production monitoring can detect excursions without treating every signal as a confirmed physical defect.

Interested partyCombines sources[1][2]

A high-throughput optical system that detects and maps defects on patterned wafers for process monitoring and yield learning.

Boundary: The cited manufacturers document the equipment category and its intended uses; this record does not independently validate vendor performance claims or rank products.

Qualification and production boundaries

The inspection strategy must state target defect classes, minimum actionable size, optical mode, layer noise, capture and nuisance targets, wafer sampling, review capacity, recipe ownership, and escalation limits.

Bounded inferenceMaha inference[1][2]

The inspection strategy must state target defect classes, minimum actionable size, optical mode, layer noise, capture and nuisance targets, wafer sampling, review capacity, recipe ownership, and escalation limits.

Boundary: Actual acceptance limits, recipes, throughput, availability, and ownership economics are product-, process-, site-, and contract-specific.

Sources

Citations support the tagged claims above. Access dates record when Maha Strategies last checked the public source.

  1. [1]Annual Report: Process Control and Yield Management · KLA · 2024 · accessed 2026-08-13
  2. [2]Annual Report: Inspection, Metrology, and Yield Analysis · KLA · 2019 · accessed 2026-08-13

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Direct answer

  • An optical patterned-wafer inspector illuminates and scans production wafers, compares detected signals across dies or to a reference, and applies detection and classification algorithms to identify candidate defects at useful production throughput.

Mechanism and method

  • Load and align wafer
  • Select optical and detection mode
  • Scan production area
  • Detect and classify candidates
  • Sample review and disposition

What is measured

  • Sensitivity
  • Throughput
  • Nuisance rate
  • Illumination mode
  • Sampling plan
  • Recipe stability
  • Defect-of-interest capture
  • Capture-rate study
  • Nuisance-rate study
  • Tool matching
  • Review sampling

Limitations

  • Missed defect
  • Nuisance overload
  • Reference mismatch
  • Focus drift
  • Wafer-edge artifact
  • Classification bias

Boundaries declared by the cited sources

  • A preprint evaluating research models on imec datasets. It reports no tool throughput, no production yield impact, and nothing about how any commercial inspection system performs. Its abstract carries no numeric accuracy figures, so no quantitative performance claim may rest on it. (boundary declared by Deep Learning-Based Defect Classification and Detection in SEM Images)

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