EquipmentStatus: FOUNDATIONALUpdated 2026-08-24

Overlay, Critical-Dimension, and Film Metrology System

Optical or electron-based measurement equipment used to quantify layer alignment, feature dimensions, film thickness, and related process variation.

Evidence status

Checked against 1 inspected source

One source was retrieved, identified and read, and the claims below are tied to specific passages at the scope those passages state. Each source also records what it cannot establish.

Rely on this page for

The specific claims that carry a cited passage, at the scope that passage states.

Definition

Patterning and film metrology systems measure defined targets or product structures to estimate overlay, critical dimension, profile, film thickness, composition, stress, or other properties used for process control and wafer disposition.

Process position

Inputs

  • Processed wafer
  • Measurement recipe
  • Target design
  • Calibration model

Outputs

  • Measurement dataset
  • Wafer and field maps
  • Correction or disposition input

How it works

  1. 01Load and identify wafer
  2. 02Align to measurement targets
  3. 03Acquire optical or electron signal
  4. 04Fit calibrated model
  5. 05Map results and feed control loop

Role in the production flow

Metrology converts physical structures into control variables. The reported number depends on target design, acquisition physics, calibration, model assumptions, sampling, and correlation to the device feature the process actually needs to control.

Interested partyCombines sources[1][2]

Optical or electron-based measurement equipment used to quantify layer alignment, feature dimensions, film thickness, and related process variation.

Boundary: The cited manufacturers document the equipment category and its intended uses; this record does not independently validate vendor performance claims or rank products.

Qualification and production boundaries

Method qualification must state measurand, target, reference traceability, accuracy and precision, model, sampling plan, tool matching, uncertainty, destructive or nondestructive status, and control-loop latency.

Bounded inferenceMaha inference[1][2]

Method qualification must state measurand, target, reference traceability, accuracy and precision, model, sampling plan, tool matching, uncertainty, destructive or nondestructive status, and control-loop latency.

Boundary: Actual acceptance limits, recipes, throughput, availability, and ownership economics are product-, process-, site-, and contract-specific.

Sources

Citations support the tagged claims above. Access dates record when Maha Strategies last checked the public source.

  1. [1]Annual Report: Process Control and Yield Management · KLA · 2024 · accessed 2026-08-13
  2. [2]Annual Report: Inspection, Metrology, and Yield Analysis · KLA · 2019 · accessed 2026-08-13

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Direct answer

  • Patterning and film metrology systems measure defined targets or product structures to estimate overlay, critical dimension, profile, film thickness, composition, stress, or other properties used for process control and wafer disposition.

Mechanism and method

  • Load and identify wafer
  • Align to measurement targets
  • Acquire optical or electron signal
  • Fit calibrated model
  • Map results and feed control loop

What is measured

  • Accuracy
  • Precision
  • Tool-induced shift
  • Sampling density
  • Model validity
  • Target-to-device correlation
  • Reference-material calibration
  • Repeatability and reproducibility
  • Tool matching
  • Target correlation
  • Uncertainty analysis

Limitations

  • Calibration drift
  • Model mismatch
  • Target asymmetry
  • Sampling blind spot
  • Tool mismatch
  • Correction overfit

Boundaries declared by the cited sources

  • A preprint outlining requirements and challenges. It reports no tool vendor performance, no yield data, no process recipe and no measurement uncertainty budget for any named product, so it cannot support a claim about how any particular instrument performs. (boundary declared by Metrology Requirements for Next Generation of Semiconductor Devices)

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